const PalData TRFObjDataPal[]={
	{(void *)tr4_006_pcl_ADRS,	CELLID_tr4_006},
	{(void *)tr4_011_pcl_ADRS,	CELLID_tr4_011},
	{(void *)tr4_023_pcl_ADRS,	CELLID_tr4_023},
	{(void *)tr4_057_pcl_ADRS,	CELLID_tr4_057},
	{(void *)tr4_044_pcl_ADRS,	CELLID_tr4_044},
	{(void *)tr4_049_pcl_ADRS,	CELLID_tr4_049},
	{(void *)tr4_020_pcl_ADRS,	CELLID_tr4_020},
	{(void *)tr4_037_pcl_ADRS,	CELLID_tr4_037},
	{(void *)tr4_024_pcl_ADRS,	CELLID_tr4_024},
	{(void *)tr4_039_pcl_ADRS,	CELLID_tr4_039},
	{(void *)tr4_069_pcl_ADRS,	CELLID_tr4_069},
	{(void *)tr4_018_pcl_ADRS,	CELLID_tr4_018},
	{(void *)tr4_070_pcl_ADRS,	CELLID_tr4_070},
	{(void *)tr4_072_pcl_ADRS,	CELLID_tr4_072},
	{(void *)tr4_022_pcl_ADRS,	CELLID_tr4_022},
	{(void *)tr4_055_pcl_ADRS,	CELLID_tr4_055},
	{(void *)tr4_056_pcl_ADRS,	CELLID_tr4_056},
	{(void *)tr4_026_pcl_ADRS,	CELLID_tr4_026},
	{(void *)tr4_021_pcl_ADRS,	CELLID_tr4_021},
	{(void *)tr4_027_pcl_ADRS,	CELLID_tr4_027},
	{(void *)tr4_058_pcl_ADRS,	CELLID_tr4_058},
	{(void *)tr4_009_pcl_ADRS,	CELLID_tr4_009},
	{(void *)tr4_007_pcl_ADRS,	CELLID_tr4_007},
	{(void *)tr4_016_pcl_ADRS,	CELLID_tr4_016},
	{(void *)tr4_040_pcl_ADRS,	CELLID_tr4_040},
	{(void *)tr4_059_pcl_ADRS,	CELLID_tr4_059},
	{(void *)tr4_025_pcl_ADRS,	CELLID_tr4_025},
	{(void *)tr4_029_pcl_ADRS,	CELLID_tr4_029},
	{(void *)tr4_060_pcl_ADRS,	CELLID_tr4_060},
	{(void *)tr4_061_pcl_ADRS,	CELLID_tr4_061},
	{(void *)tr4_062_pcl_ADRS,	CELLID_tr4_062},
	{(void *)tr4_047_pcl_ADRS,	CELLID_tr4_047},
	{(void *)tr4_050_pcl_ADRS,	CELLID_tr4_050},
	{(void *)tr4_063_pcl_ADRS,	CELLID_tr4_063},
	{(void *)tr4_064_pcl_ADRS,	CELLID_tr4_064},
	{(void *)tr4_030_pcl_ADRS,	CELLID_tr4_030},
	{(void *)gl4_009_pcl_ADRS,	CELLID_gl4_009},
	{(void *)gl4_010_pcl_ADRS,	CELLID_gl4_010},
	{(void *)gl4_011_pcl_ADRS,	CELLID_gl4_011},
	{(void *)gl4_012_pcl_ADRS,	CELLID_gl4_012},
	{(void *)gl4_001_pcl_ADRS,	CELLID_gl4_001},
	{(void *)gl4_002_pcl_ADRS,	CELLID_gl4_002},
	{(void *)gl4_003_pcl_ADRS,	CELLID_gl4_003},
	{(void *)gl4_004_pcl_ADRS,	CELLID_gl4_004},
	{(void *)gl4_005_pcl_ADRS,	CELLID_gl4_005},
	{(void *)gl4_006_pcl_ADRS,	CELLID_gl4_006},
	{(void *)gl4_007_pcl_ADRS,	CELLID_gl4_007},
	{(void *)gl4_013_pcl_ADRS,	CELLID_gl4_013},
	{(void *)tr4_015_pcl_ADRS,	CELLID_tr4_015},
	{(void *)tr4_065_pcl_ADRS,	CELLID_tr4_065},
	{(void *)tr4_017_pcl_ADRS,	CELLID_tr4_017},
	{(void *)tr4_066_pcl_ADRS,	CELLID_tr4_066},
	{(void *)tr4_038_pcl_ADRS,	CELLID_tr4_038},
	{(void *)tr4_002_pcl_ADRS,	CELLID_tr4_002},
	{(void *)tr4_073_pcl_ADRS,	CELLID_tr4_073},
	{(void *)tr4_008_pcl_ADRS,	CELLID_tr4_008},
	{(void *)tr4_010_pcl_ADRS,	CELLID_tr4_010},
	{(void *)tr4_036_pcl_ADRS,	CELLID_tr4_036},
	{(void *)tr4_034_pcl_ADRS,	CELLID_tr4_034},
	{(void *)tr4_033_pcl_ADRS,	CELLID_tr4_033},
	{(void *)tr4_041_pcl_ADRS,	CELLID_tr4_041},
	{(void *)tr4_042_pcl_ADRS,	CELLID_tr4_042},
	{(void *)tr4_043_pcl_ADRS,	CELLID_tr4_043},
	{(void *)tr4_045_pcl_ADRS,	CELLID_tr4_045},
	{(void *)tr4_035_pcl_ADRS,	CELLID_tr4_035},
	{(void *)tr4_046_pcl_ADRS,	CELLID_tr4_046},
	{(void *)tr4_013_pcl_ADRS,	CELLID_tr4_013},
	{(void *)tr4_012_pcl_ADRS,	CELLID_tr4_012},
	{(void *)tr4_048_pcl_ADRS,	CELLID_tr4_048},
	{(void *)tr4_053_pcl_ADRS,	CELLID_tr4_053},
	{(void *)tr4_019_pcl_ADRS,	CELLID_tr4_019},
	{(void *)tr4_003_pcl_ADRS,	CELLID_tr4_003},
	{(void *)tr4_004_pcl_ADRS,	CELLID_tr4_004},
	{(void *)tr4_014_pcl_ADRS,	CELLID_tr4_014},
	{(void *)tr4_051_pcl_ADRS,	CELLID_tr4_051},
	{(void *)tr4_052_pcl_ADRS,	CELLID_tr4_052},
	{(void *)tr4_032_pcl_ADRS,	CELLID_tr4_032},
	{(void *)tr4_001_pcl_ADRS,	CELLID_tr4_001},
	{(void *)tr4_028_pcl_ADRS,	CELLID_tr4_028},
	{(void *)tr4_068_pcl_ADRS,	CELLID_tr4_068},
	{(void *)tr4_067_pcl_ADRS,	CELLID_tr4_067},
	{(void *)tr4_031_pcl_ADRS,	CELLID_tr4_031},
	{(void *)gl4_014_pcl_ADRS,	CELLID_gl4_014},
	{(void *)gl4_015_pcl_ADRS,	CELLID_gl4_015},
	{(void *)gl4_016_pcl_ADRS,	CELLID_gl4_016},
	{(void *)gl4_017_pcl_ADRS,	CELLID_gl4_017},
	{(void *)gl4_018_pcl_ADRS,	CELLID_gl4_018},
	{(void *)gl4_019_pcl_ADRS,	CELLID_gl4_019},
	{(void *)gl4_020_pcl_ADRS,	CELLID_gl4_020},
	{(void *)tr1_000_pcl_ADRS,	CELLID_tr1_000},
	{(void *)tr1_053_pcl_ADRS,	CELLID_tr1_053},
	{(void *)tr3_003_pcl_ADRS,	CELLID_tr3_003},
	{(void *)tr3_004_pcl_ADRS,	CELLID_tr3_004},
};
